Pringle Electronics Group

                                    Westshore Systems, LLC
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                                                        LEIGH PRINGLE                                       Rev. 9/23/2014
Telephone: (530)644-9921, Cell: (530)412-1233,  FAX:  (530)644-4593
eeleigh@pringleelectronics.com
5530 Sierra Springs Drive, Pollock Pines, CA 95726

SUMMARY OF EXPERIENCE: Experience ranges from analog and digital circuit design, FPGA/CPLD/SoC and embedded microprocessor/ MCU based hardware and firmware design, Board level and PCB design and ATE, to management and executive positions. Primary focus for the last 25 years has been in embedded systems hardware and firmware design and FPGA/CPLD/SoC. Microcontrollers include ARM (9,11, Cortex M-3, M-4, A-9 with TI, Freescale, Altera SoCFPGA, Xilinx ZYNQ, Atmel, STMicro, NXP, Samsung and Broadcom), MSP430, AVR, AVR XMega, AVR32, Renesas, x86, PIC16,18,24,32, Various 8051 derivatives and SoC based designs with Altera, Xilinx and Cypress PSoC. FPGA/CPLD design  in VHDL, Verilog and schematic entry. Software development in C, some C++ and assembly, with focus on embedded firmware applications. Bare metal, Linux, Windows XPe and  RTOS based designs. Strong focus on hardware analysis and hardware/software interaction. Development of tests/diagnostics in C, Python and Perl.  Applications  include a variety of  simple to high end embedded systems, including satellite/space equipment, AC power monitoring/analysis, electric vehicle management, threat detection/homeland security, pellet and gas fireplace controllers, automotive diagnostic equipment (OBDII), USB devices, CAN bus based systems, Bluetooth, telecom, video, audio, LAN/networking products, hand held sports products, medical products, remote sensing and monitoring, motion control, POS devices, and others with recent focus on Internet of Things (IoT) and industrial wireless mesh networks. Experience includes battery powered portable and  PoE, PoUSB devices. Certified Design Services Network Partner for Altera FPGAs/CPLDs,  Renesas Alliance Partner, Atmel Certified Design Partner, Cypress PSoC Certified Design Partner, Silego Certified Design Partner, Approved Mentor Design House for PADS PCB, PADS Logic and DX Designer. User and developer experience in electronic CAD/CAE tools for logic, fault and circuit simulation including SILOS, ModelSim and SPICE. Schematic capture systems include OrCAD, ECS, Mentor PowerLogic and DX Designer(Viewlogic). PCB design with Mentor PADS PCB and Cadence-Allegro. Experience in military and aerospace, secret clearance (inactive). Full background check for homeland security type work. Revision control with Subversion and GIT.

BUSINESS EXPERIENCE:
9/96 to Present.  Consultant, Pringle Electronics Group (Owner/President)
Project experience is as follows:
Current/Recent Projects (6/2014 to Present), First, Internet of Things (IoT) project for home automation in HVAC related industry, project includes development of embedded control end hardware and firmware, XBee-WiFI 802.11b/g/n module interface and Etherios IoT Cloud deployment, custom web application (mixed node.js, Python and C++) with web services, deployed to Heroku, transitioning to AWS later. Second, Xilinx Spartan6 FPGA project, Verilog, for DNA analysis (Genomics) equipment. Also, ongoing Mesh networking project and various Atmel AVR project updates for HVAC industries. Small BLE project for wearable product. Client information available upon request.
6/2011 to 6/2014, Altera CycloneV project with PCIe, DDR3 and multiple NIOSII cores (Verilog for FPGA fabric and C for NIOSII), Embedded WiFi H/W and S/W project with embedded web server, Mesh networking project with Synapse 802.15.4 wireless modules, SNAP OS and Linux host, Altera SoCFPGA project with CycloneV SoC using QuartusII/QSys/SoCEDK for Linux based industrial control application.  Xilinx ZINQ project with ISE/SDK/Platform Studio, primary responsibilities were for the ARM Cortex A-9 cores side including secure boot/operation and Multi-Processing with Linux  and RTOS asymmetrical cores. FPGA side development  in VHDL, project included  AXI bus interconnect of various IP modules. Firmware development for ST Micro STM32 (ARM Cortex M-3)  project for power monitoring industry using IAR EWARM tools. Custom bootloader supporting web based firmware updating  for AVR Mega. Development of hardware and firmware for two products transitioning from PIC based designs to TI Stellaris (ARM Cortex M-3) using OrCAD, PADS-Flow and Keil ARM tools. These were for electric vehicle industry. Another  project was for Ag vehicles, Windows XPe image build for product based on an Intel Atom based single board computer with USB, CAN bus, touch screen, etc. Also, consulted on a hand held threat detection (explosives, drugs, etc.) product based on Atmel AVR32. Worked on LCD graphic display code and hardware verification. Develop DVT plan and perform test/verification for medical product implementing Bluetooth 2.1.
12/2009 to 6/2011, acted as senior member of OS firmware engineering team for a large POS equipment company. Firmware development for a proprietary Linux derivative Operating System. Tasks included development of drivers, Application Program Interfaces (APIs), and general code modules in C language. Low level interface to hardware and resolution of hardware/software inter-related issues. Significant focus on USB (device classes, enumeration, endpoints, TD allocation, bus traffic analysis, etc.) and Ethernet drivers. Code development under PVCS software revision control systems and Agile product life cycle management systems in a large team environment. Products were hand held electronic payment processing terminals supporting magnetic strip, smart card and contactless cards with RS232, USB, Bluetooth, Ethernet and wireless connections to point of sale equipment. Units were ARM9 and ARM11 secured processor powered, with tamper protection and other security. Also, hardware architecture for USB connected  peripheral project which housed thermal printer, USB host device, Ethernet, UART and modem based on ARM Cortex-M3 processor.
3/2008 to 12/2009,  Projects were a large FPGA (Altera) redesign to add diagnostics, testability and features in a CCA for high end threat detection system. Also, large hardware/ firmware architecture and design project for a medical product based on Renesas SuperH family processor running uCOSII real time OS and large Altera CPLD. Project included precision control of BLDC motor and  Stepper motor, CAN bus/CAN OPEN, RFID and large amounts of I/O. Other projects included automotive and fireplace/stove controllers.
11/ 2006 to 2/2008,  primarily retained by large client, projects included 2 large Altera FPGA projects (one with SoC) and 2 Atmel AVR/AVR32 based controller projects. Projects were for digital control of microwave frequency hopping synthesizers and threat detection for homeland security. Projects encompassed architecture, hardware and firmware design.
2003 to 11/2006, 40+ projects with FPGA/CPLD and/or microcontrollers including SoC. Projects included fireplace controllers (pellet, gas), specialty network products for LAN/Wifi, custom USB products, automotive diagnostic equipment (CAN, OBDII), audio, complex sensing and control systems, specialty microwave system controllers, surveillance, RV Leveling systems, memory and bus control FPGAs and  FPGA designs which integrate several subsystems in custom applications. FPGA and CPLD projects were based upon Altera and Xilinx families, with design sizes from a few thousand gates to 500K gates (mostly 25K to 50K gates). Processor technologies included ARM7, AVR, AVR32, x86 and 8051 derivatives.
1996 to 2003, 70+ projects with FPGA/CPLD and/or embedded processors. Projects included fireplace controllers (pellet), RV products, music products, medical/dental, remote environmental monitoring, factory control, video routing/distribution and vehicle security. FPGA and CPLD projects were based upon Altera, Atmel and Xilinx families. Processor technologies included AVR, x86, PIC, Mitsubishi and 8051 derivatives.

6/95 to 9/96.  Silicon Graphics, Inc.  Mountain View, CA
Member of Technical Staff/Senior Process Engineer, Digital Media Systems/IMSD
Acted as senior engineering member and advisor to manufacturing engineering group.  Primary responsibilities included working as part of a large ASIC (500K + gates) design team, primarily adding design for testability (internal SCAN, etc.) and test vectors, working on a product manufacturing release team, and (from 1/96), working as lead diagnostics software developer for group.  Products are high end, UNIX based, graphics workstations and supercomputers based upon MIPS RISC architectures.

1/91 to 6/95.  Auburn Electronics Group, Auburn, CA/El Dorado Hills, CA
Chairman of Board/Director of Engineering 5/94 to 6/95, President/CEO 8/92 to 4/94, Vice President, Business Development 1/91 to 7/92
Co-founder of research and development/consulting company.  Responsibilities included engineering (concept, product and circuit/chip level), corporate business and financial management, sales and marketing.
Company specialized in chip, board and product level design, printed circuit board design, EMI (including FCC) and manufacturability consulting.  Products developed include telecom, computers, embedded systems, motion control, video and consumer electronics.
 
1/90 to 1/91.  Synesis Corporation, Fremont, CA/Rocklin, CA
Director of Engineering, Rocklin Design Center
Founding position in startup company.  Primary responsibilities included management/direction of Rocklin design automation/engineering center and hands on design projects including microprocessor based medical products. Other duties included customer interfacing, corporate CAD/CAE and computer integrated manufacturing(CIM) planning, site CIM and test engineering.

2/88 to 1/90.  Unisys/Convergent, Roseville, CA
Senior Staff Engineer, Custom Products
Primary responsibilities included conceptual and circuit level design/ redesign of customer specific products, with emphasis on quick-turn, quality and manufacturability.  Many projects were PC/AT plug in cards for telecom applications.  Additional responsibilities included CAE planning, integration and interface development.  Other duties were software development, SMT and through hole printed circuit design, project management and participation in group's sales, marketing and planning.

2/87 to 2/88.  Simucad Corporation, Menlo Park, CA
Senior Applications Engineer
Duties included pre and post sales engineering support, technical and sales presentations, applications and interface software development, product enhancements, sales and some marketing work. Products were logic and circuit simulators for electronic CAE.

7/81 to 2/87.  Sacramento Army Depot(DOD), Sacramento, CA
Automated Systems Division, Systems Engineering Branch
Duties included test system design and integration, systems and project planning, instrumentation and interface design, software development, logic simulation, IC modeling, analog and digital test program development.  Design and management of IEEE-488 bus test system projects. Secret clearance.

8/80 to 4/81.  Questar Electronic Design, Rancho Cordova, CA
Chief Engineer, Research and Development Department
Responsible for new product design and product improvement.  Design of low distortion power amplifiers, pre-amplifiers and power supplies. Responsible for production test systems and procedures.  Also served as production manager for three months in addition to engineering duties.

12/78 to 8/80.  Ramko Research, Inc. Rancho Cordova, CA
Engineer
Responsible for design and verification/test of broadcast audio amplifiers, pre-amplifiers, signal processing and routing systems and power supplies.  Advisor to production test and quality assurance for testing procedures and problems.  Design of printed circuit boards and mechanical packaging.

EDUCATION:

Sierra College, Rocklin, CA             California State University, Sacramento, CA
A.S.E.T. (Electronics)  1975            Electrical/Electronic Engineering  1980 to 1982

Member IEEE

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